1. Field of the Invention
The present invention relates to an image processing apparatus performing for example asynchronous input/output type digital image processing using an image memory and a method of the same, and a display apparatus using the image processing apparatus.
2. Description of the Related Art
In asynchronous input/output type digital image processing using a image memory, a write operation of image data into the image memory and a read operation of image data from the image memory are performed independently. For this reason, sometimes input frames are switched in the middle of image output.
In general, in the case of a still image having a high correlation between frames such as with graphics, this switching cannot be discerned so does not become a problem.
In the case of a moving image, however, this creates a horizontal stripe which constitutes noise moving on the screen. This memory overrun is referred to as xe2x80x9cfield tearingxe2x80x9d.
Conventionally, as a method of avoiding this field tearing (memory overrun), mainly a xe2x80x9cdouble buffer methodxe2x80x9d of using a plurality of image memories and storing the image data in a different memory for every frame and an xe2x80x9coutput line delay methodxe2x80x9d of adjusting read and write timings of the input/output images with respect to a single image memory have been employed.
Summarizing the problem to be solved by the invention, generally, when processing a moving image, however, use is made of a vertical synchronization method of locking a phase of an output side vertical synchronization signal V-SYNC with the input, so the problem of the field tearing can be solved by the xe2x80x9cdouble buffer methodxe2x80x9d of processing the input signal in a different memory for every field (or frame).
This xe2x80x9cdouble buffer methodxe2x80x9d, however, requires a large capacity memory, so there is a disadvantage of an increased cost.
The xe2x80x9coutput line delay methodxe2x80x9d is free from any cost disadvantage and is a general function available in almost all scan converters at present.
This conventional xe2x80x9coutput line delay methodxe2x80x9d, however, has the disadvantage that it is difficult to avoid field tearing under all conditions with a fixed amount of delay since the required delay differs according to the frequencies of the input and output signals and degree of a special image processing such as enlargement or reduction of the image.
Also, field tearing becomes noise discernable only with respect to the moving image portion, therefore it was not practical to have the user adjust the number of delay lines.
Below, an explanation will be given, with reference to the drawings, of the reason why memory overrun is fixed on a screen in the vertical synchronization mode in the xe2x80x9coutput line delay methodxe2x80x9d for the case of enlargement and reduction.
First, an explanation will be given of the case of enlargement with reference to FIG. 12 to FIG. 16.
FIG. 12 is a view of an image write area and read area of a frame memory in a case where an image is enlarged 2-fold in the vertical synchronization mode at the time of input of a still image.
In FIG. 12, reference numeral 1 denotes a frame memory, ARWR an image write area, and ARRD a read area.
As will be understood from FIG. 12, the memory area ARRD accessed on the read side is a half of the memory area ARWR accessed on the write side.
Also, because of the vertical synchronization mode, the times required for the write and read operations of the image in 1V (1 vertical synchronization period) are the same, so a write speed of the image becomes two times the read speed.
The vertical synchronization signals V-SYNC serving as the triggers for starting the write and read operations are identical in terms of time, but the positions for starting the access differ (concretely, in FIG. 12, a write start position is (a) and a read start position is (b)), therefore, right after the start of access, the already written information of one frame before is read and written (in FIG. 12, a write end position is (c) and a read end position is (d)), then the information of the current frame is read.
Next, an explanation will be given of the principle of the occurrence of field tearing at the time of enlargement with reference to moving image samples shown in FIG. 13.
FIG. 14 is a view of the transition over time of the image data inside a frame memory and output images in a case where two consecutive frames having different image information as shown in FIG. 13 are processed in the vertical synchronization mode.
In FIG. 14, the center portion of the image is cut out, so the memory positions of the write and read operation match at the center of the screen. The timings of the read and write operations become reversed at this position. The field tearing from an old image to a current image occurs there.
Even when changing the enlargement rate, the relationship of xe2x80x9cwrite area greater than read areaxe2x80x9d is held, so the field tearing always occurs at the screen center due to a similar reason.
FIG. 15 is a view of the transition over time of the image data inside the frame memory and the output images in a case where an image is shifted downward.
When shifting the image phase, the situation differs according to the amount and direction of movement.
The downward shift of the image means to take out an upper portion data of the memory.
In this case, the positions of the memory for starting access match, in other words, since the write operation and the read operation start from the identical line and the write speed is two times of the read speed, overrun does not occur or field tearing is caused at the uppermost portion of the screen, generally, a blanking area.
Also, FIG. 16 is a view of the transition over time of the image data inside the frame memory and the output images in a case where an image is shifted upward.
As shown in FIG. 16, when shifting an image upward, the positions of the memory where the accesses end match, in other words, the write and read operations end on the same line, so the field tearing will occur in the lowermost portion of the screen or the field tearing will not occur.
As will be understood from the above description, the position of occurrence of field tearing varies according to the enlargement rate and the amount of shift. Depending on the amount of the shift, there are also cases where the field tearing is hidden in the blanking area, but in principle the field tearing always occurs.
First, an explanation will be given of the case of reduction with reference to FIG. 17 to FIG. 21.
FIG. 17 is a view of the image write area and read area of a frame memory in a case where an image is reduced to xc2xd (image center reduction) in the vertical synchronization mode at the time of input of a still image.
In this case, the memory areas accessed on the read side and the write side are identical.
Because of the vertical synchronization mode, the vertical synchronization signals V-SYNC serving as the triggers for starting the write and read operations are identical in terms of time, but the times for starting access differ (in FIG. 17, the write start position is (a) and the read start position is (b)).
In the period immediately after the start of access and up to the read start position (b), the memory is not accessed for a read operation. Only the lines are counted, and blanking is applied to the screen.
At the point of time of the read start position (b), the image of the current frame has been already written up to xc2xc of the entire image, so the image taken out at the time of the start of the read operation of the memory is the data of the current frame.
On the other hand, at the end of the read operation (indicated by (d) in FIG. 17), irrespective of the end line of the memory being read, the write side has finished only xc2xe of the entire image, so the data of the previous frame ends up being read at the lower portion of the screen.
Below, an explanation will be given of the principle of field tearing by using the moving image samples shown in FIG. 18 in the same way as the time of enlargement.
FIG. 19 is a view of the transition over time of the image data inside the frame memory and the output images in the case where two consecutive frames having different image information as in FIG. 18 are processed in the vertical synchronization mode.
In FIG. 19, the center portion of the screen is cut out, so the positions in the memory of the write and read operations match at the screen center, the timings of the read and write operations become reversed at this position, and the field tearing from the current image to the old image occurs there.
Even when changing the reduction rate, the relationship of xe2x80x9cwrite time greater than read timexe2x80x9d is held, so the field tearing always occurs at the screen center for a similar reason.
FIG. 20 is view of the transition over time of the image data inside the frame memory and the output images in the case when an image is shifted upward.
In the same way as the time of enlargement, when shifting the image phase, the situation differs according to the amount and direction of movement.
In this case, since the positions of the memory where the accesses are started match, in other words, the write and read operations start from the identical line, and the read speed is two times the write speed, the field tearing does not occur or the field tearing is caused in the uppermost portion of the screen, generally, the blanking area.
FIG. 21 is a view of the transition over time of the image data inside the frame memory and the output images in the case where an image is shifted downward.
As shown in FIG. 21, when shifting an image downward, the positions of the memory where the accesses end match, in other words, the write and read operations end on the same line, so the field tearing will occur in the lowermost portion of the screen or the field tearing will not occur.
As seen from the above description, the position of occurrence of field tearing varies according to the reduction rate and the amount of shift. Depending on the amount of shift, the field tearing is sometimes hidden in the blanking area, but in principle the field tearing always occurs.
An object of the present invention is to provide an image processing apparatus capable of avoiding the occurrence of field tearing (memory overrun) even when read and write operations of input/output images are carried out with respect to a single image memory and a method of the same, and a display apparatus using the image processing apparatus.
According to a first aspect of the present invention, there is provided an image processing apparatus for performing read and write operations of input/output images with respect to a single image memory, comprising a first circuit for generating an image output timing based on at least a read area of the image memory so that a timing of access of a read position in the read area which becomes a boundary with a non-read area, that is, a blanking period, and a timing for performing a write operation at substantially the same position substantially match and a second circuit for performing a write operation of the input image to the image memory and outputting an image read from the image memory at the image output timing generated at the first circuit.
Further, in the image processing apparatus of the present invention, the first circuit generates the image output timing based on the read area of the image memory, a write speed to the image memory, and a read speed from the image memory.
Further, in the image processing apparatus of the present invention, the second circuit performs the write operation of the image to the image memory and the read operation of the image from the image memory in synchronization with vertical synchronization signals, and the first circuit generates the image output timing by setting the phases of the output vertical synchronization signals so that the read position which becomes the boundary of the output image and the write position match in time.
Alternatively, in the image processing apparatus of the present invention, the first circuit delays the image output timing so that the timing of access to a read end address and the timing for performing a write operation at substantially the same address substantially match.
Alternatively, in the image processing apparatus of the present invention, the first circuit delays the image output timing so that the timing of access to a read start address and the timing for performing a write operation at substantially the same address substantially match.
According to a second aspect of the present invention, there is provided an image processing method for performing read and write operations of input/output images with respect to a single image memory, comprising a first step of generating an image output timing based on at least a read area of the image memory so that a timing of access of a read position in the read area which becomes a boundary with a non-read area, that is, a blanking period, and a timing for performing a write operation at substantially the same position substantially match and a second step of performing a write operation of the input image to the image memory and outputting an image read from the image memory at the image output timing generated at the first step.
According to a third aspect of the present invention, there is provided a display apparatus for performing read and write operations of input/output images with respect to a single image memory, comprising: a first circuit for generating an image output timing based on at least a read area of the image memory so that a timing of access of a read position in the read area which becomes a boundary with a non-read area, that is, a blanking period, and a timing for performing a write operation at substantially the same position substantially match and a second circuit for performing a write operation of the input image to the image memory and outputting an image read from the image memory at the image output timing generated at the first circuit.
Further, in the display apparatus of the present invention, the first circuit generates the image output timing based on the read area of the image memory, a write speed to the image memory, and a read speed from the image memory.
Further, in the display apparatus of the present invention, the second circuit performs the write operation of the image to the image memory and the read operation of the image from the image memory in synchronization with vertical synchronization signals, and the first circuit generates the image output timing by setting the phases of the output vertical synchronization signals so that the read position which becomes the boundary of the output image and the write position match in time.
Alternatively, in the display apparatus of the present invention, the first circuit delays the image output timing so that the timing of access to a read end address and the timing for performing a write operation at substantially the same address substantially match.
Alternatively, in the display apparatus of the present invention, the first circuit delays the image output timing so that the timing of access to a read start address and the timing for performing a write operation at substantially the same address substantially match.
According to the present invention, for example in the first circuit, output timings of the write timing and the read timing of the image memory are generated based on the write speed to the image memory, the read speed from the image memory, and the read area so that the timing of access to the read end address (or the timing of access to the read start address) and the time for performing a write operation to the same address match and supplied to the second circuit.
In the second circuit, upon receipt of the timing information supplied by the first circuit, the image output timing is adjusted so that the timing of access to the read end address (or the timing of access to the read start address) and the timing for performing a write operation at the same address match and output the image read from the image memory at this timing.
By this, field tearing is avoided in various input/output signals and image enlargement/reduction.